At Intel 's(NASDAQ: INTC) Feb. 9 investor meeting, the company talked a little bit about chip manufacturing -- arguably, the company's core competency. Though the company didn't dedicate a whole presentation to chip-manufacturing technology as it has in recent years -- apparently, the company will be doing an entirely separate presentation sometime in the first half of this year -- Intel executive Murthy Renduchintala did take the opportunity to highlight that the company has a three-year lead over competing chip manufacturers.
In this column, I'd like to put that claim under the microscope and see if it checks out.
Check out the following slide from Intel:
The focus of this presentation was on a metric that Intel calls "effective logic cell area" -- essentially, the lower the number, the better.
The company claims that its 14-nanometer technology, which went into high-volume production in the first half of 2014, will have had clear leadership in this metric until Intel's competition -- Samsung (NASDAQOTH: SSNLF) and Taiwan Semiconductor Manufacturing Company (NYSE: TSM) -- release their 10-nanometer technologies in the first half of this year. Intel's chart seems to suggest that those 10-nanometer technologies will offer comparable logic-cell areas to Intel's 14-nanometer technology -- though the chart indicates that Intel's 14-nanometer technology will be slightly behind on this metric.
During his presentation, Renduchintala also indicated that he expects that Intel will "continue to maintain a three-year lead, even after [Intel's] competitors release their 10-nanometer plans during the course of this year."
Challenging that claim
Intel has made a reasonable case for why its 14-nanometer technology is more comparable to competing 10-nanometer technologies than to competing 14/16-nanometer technologies -- at least when it comes to logic-cell area. Intel has also done a good job explaining why its 10-nanometer technology should give the company a significant logic-cell area lead over competing 10-nanometer technologies. Intel's chart also indicates, quite honestly, that its 10-nanometer technology will go into production a few quarters later than competing 10-nanometer technologies.
What the chart is missing, however, is information regarding competing 7-nanometer technologies. It's not clear when Samsung intends to go into mass production on its 7-nanometer technology, but TSMC has said that it intends to go into mass production on its 7-nanometer technology in the first half of 2018. Presumably, this technology will be shipping in very high volumes in support of Apple's 2018 iPhone.
TSMC is claiming a significant area reduction for its 7-nanometer technology relative to its 10-nanometer technology -- EETimes reports a 1.63 times increase in routed gate density for TSMC's 7-nanometer tech compared to its 10-nanometer tech -- so it seems likely that Intel will have far less of a lead during its 10-nanometer generation than it did during its 14-nanometer generation.
More clarity needed
At this point, I'm struggling to see how Intel can justify its claim that, in terms of logic-cell density, it will be able to maintain a three-year lead over TSMC, as it looks as though Intel's lead will shrink generation over generation.
Intel is expected to do a full day's worth of presentations related to chip-manufacturing technology at some point in the first half of this year. I hope the company will provide more detail about its future technology plans -- both 10-nanometer and 7-nanometer -- as well as, perhaps, a more detailed and comprehensive competitive comparison.
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